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| ICS554-01A LOW SKEW 1 TO 4 CLOCK BUFFER PECL IN, PECL OUT Description The ICS554-01A is a low skew clock buffer with a single complimentary PECL input to four PECL outputs. Part of ICS' Clock BlocksTM family, this is our lowest skew PECL clock buffer. The ICS554-01A is footprint compatible with the ICS554-01, but requires fewer passive components for termination thus providing a cost-saving alternative. For parts which do not require PECL inputs or outputs, see the ICS553 for a 1 to 4 low skew buffer, or the ICS552-02 for a 1 to 8 low skew buffer. For more than 8 outputs see the MK74CBxxx BuffaloTM series of clock drivers. ICS makes many non-PLL and PLL based low skew output devices as well as Zero Delay Buffers to synchronize clocks. Contact us for all of your clocking needs. Features * * * * * * * * * Input frequency up to 200 MHz Advanced CMOS process Outputs are skew matched to within 50 ps Packaged in 16-pin TSSOP One PECL input to 4 PECL output clock drivers Operating Voltages of 3.3 V or 5 V Industrial temperature range Functional equivalent to ICS554-01 Simplified passive termination network compared to ICS554-01 Block Diagram VDD IN IN Q0 Q0 Q1 Q1 Q2 Q2 Q3 Q3 VSS MDS 554-01A A I n t e gra te d C i r c u i t S y s t e m s 1 525 Race Stre et, San Jo se, CA 9 5126 Revision 101904 te l (40 8) 2 97-12 01 w w w. i c st . c o m ICS554-01A LOW SKEW 1 TO 4 CLOCK BUFFER PECL IN, PECL OUT Pin Assignment NC VDD Q0 Q0 Q1 Q1 GND IN 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 NC VDD Q3 Q3 Q2 Q2 GND IN 16-pin 173 mil (0.65mm) TSSOP Pin Descriptions Number 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 Name NC VDD Q0 Q0 Q1 Q1 GND IN IN GND Q2 Q2 Q3 Q3 VDD NC Type -- Power Output Output Output Output Power Input Input Power Output Output Output Output Power -- No Connect. Pin Description Connect to +3.3 V or 5 V. Must be same as pin 15. Clock Output Q0. Clock Output Q0. Clock Output Q1. Clock Output Q1. Connect to Ground. PECL Clock Input. Complementary PECL Clock Input. Connect to Ground Clock Output Q2. Clock Output Q2. Clock Output Q3. Clock Output Q3. Connect to +3.3 V or 5 V. Must be same as pin 2. No Connect. MDS 554-01A A In te grated Circuit Systems 2 525 Ra ce Street, San Jose, CA 9512 6 Revision 101904 tel (4 08) 297-1 201 w w w. i c s t . c o m ICS554-01A LOW SKEW 1 TO 4 CLOCK BUFFER PECL IN, PECL OUT External Components The ICS554-01A requires a decoupling capacitor of 0.01F to be connected between VDD on pin 2 and GND on pin 7, as well as between VDD on pin 15 and GND on pin 10. These decoupling capacitors should be placed as close to the device as possible. To achieve the low output skews that the ICS554-01A is capable of, careful attention must be paid to board layout. Essentially, all 8 outputs must have identical terminations, loads, and trace geometries. If they do not, the output skew will be degraded. For example, using a 30 series termination on one output (with 33 on the others) will cause at least 15ps of skew. Termination for PECL or LVPECL Outputs The clock layout topology shown below is a typical termination for PECL or LVPECL outputs. The two different layouts mentioned are recommended only as guidelines. FOUT and nFOUT are low impedance follower outputs that generate PECL/LVPECL compatible outputs. Therefore, termination resistors (DC current path to ground) or current sources must be used for functionality. These outputs are designed to drive 50 ohm transmission lines. Matched impedance techniques should be used to maximize operating frequency and minimize signal distortion. There are a few simple termination schemes. The figures below show two different layouts which are recommended only as guidelines. Other suitable clock layouts may exist, but it is recommended that board designers simulate to guarantee compatibility across all printed circuit and clock component process variations. Z0 = 50 ohms FOUT 3.3 V FIN Z0 = 50 ohms 5 2 Z0 5 2 Z0 50 ohms 50 ohms FOUT Z0 = 50 ohms Z0 = 50 ohms FIN C1 RTT = 1 (VOH + VOL / VCC -2) -2 RTT 3 2 Z0 3 2 Z0 Z0 C1 = 0.1F to 0.01F PECL or LVPECL Output Termination LVPECL Output Termination MDS 554-01A A In te grated Circuit Systems 3 525 Ra ce Street, San Jose, CA 9512 6 Revision 101904 tel (4 08) 297-1 201 w w w. i c s t . c o m ICS554-01A LOW SKEW 1 TO 4 CLOCK BUFFER PECL IN, PECL OUT Absolute Maximum Ratings Stresses above the ratings listed below can cause permanent damage to the ICS554-01A. These ratings, which are standard values for ICS commercially rated parts, are stress ratings only. Functional operation of the device at these or any other conditions above those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods can affect product reliability. Electrical parameters are guaranteed only over the recommended operating temperature range. Item Supply Voltage, VDD All Inputs and Outputs Ambient Operating Temperature Storage Temperature Junction Temperature Soldering Temperature 7V Rating -0.5 V to VDD+0.5 V -40 to +85 C -65 to +150C 125C 260C Recommended Operation Conditions Parameter Ambient Operating Temperature Power Supply Voltage (measured in respect to GND) Min. -40 +3.15 Typ. - Max. +85 +5.25 Units C V MDS 554-01A A In te grated Circuit Systems 4 525 Ra ce Street, San Jose, CA 9512 6 Revision 101904 tel (4 08) 297-1 201 w w w. i c s t . c o m ICS554-01A LOW SKEW 1 TO 4 CLOCK BUFFER PECL IN, PECL OUT DC Electrical Characteristics VDD=3.3 V 5% Ambient temperature -40 to +85 C Parameter Operating Voltage Peak to Peak Input Voltage Input Common Mode Range Input Common Mode Range Output High Voltage Output Low Voltage Operating Supply Current Short Circuit Current, 3.3 V Short Circuit Current, 5 V Symbol VDD IN IN IN VOH VOL IDD IOS IOS Conditions Min. 3.15 0.3 Typ. Max. 5.25 1.0 VDD-0.6 VDD-0.6 Units V V VDD=3.3 V VDD=5 V Note 1 Note 1 No Load, 135 MHz VDD-2 VDD-3.7 VDD-1.2 V VDD - 2.0 80 50 60 V mA mA mA Note 1: VOH and VOL can be set by the external resistor values on the PECL outputs. note 2: IDD includes the current through the external resistors which can be modified. AC Electrical Characteristics VDD = 3.3 V 5, Ambient Temperature -40 to +85 C Parameter Input Frequency Propagation Delay Output to Output Skew Duty Cycle Symbol Conditions VDD = 3.3 V VDD = 5 V Crosspoint of pair Crosspoint of pair Min. 0 Typ. 2 2 0 Max. 200 Units MHz ns ns 50 55 ps % 45 50 MDS 554-01A A In te grated Circuit Systems 5 525 Ra ce Street, San Jose, CA 9512 6 Revision 101904 tel (4 08) 297-1 201 w w w. i c s t . c o m ICS554-01A LOW SKEW 1 TO 4 CLOCK BUFFER PECL IN, PECL OUT Package Outline and Package Dimensions (16-pin TSSOP, 4.40 mm Body, 0.65 mm Pitch) Package dimensions are kept current with JEDEC Publication No. 95 Millimeters Symbol Min Max Inches Min Max 16 E1 IN D EX AR EA E 1 2 D A A1 A2 b C D E E1 e L aaa -1.20 0.05 0.15 0.80 1.05 0.19 0.30 0.09 0.20 4.90 5.1 6.40 BASIC 4.30 4.50 0.65 Basic 0.45 0.75 0 8 -0.10 -0.047 0.002 0.006 0.032 0.041 0.007 0.012 0.0035 0.008 0.193 0.201 0.252 BASIC 0.169 0.177 0.0256 Basic 0.018 0.030 0 8 -0.004 A 2 A 1 A c -Ce b S E A T IN G P LA N E L aaa C Ordering Information Part / Order Number ICS554GI-01A ICS554GI-01AT Marking ICS (top line) 554GI01A (2nd line) Shipping Packaging Tubes Tape and Reel Package 16-pin TSSOP 16-pin TSSOP Temperature -40 to +85 C -40 to +85 C While the information presented herein has been checked for both accuracy and reliability, Integrated Circuit Systems (ICS) assumes no responsibility for either its use or for the infringement of any patents or other rights of third parties, which would result from its use. No other circuits, patents, or licenses are implied. This product is intended for use in normal commercial applications. Any other applications such as those requiring extended temperature range, high reliability, or other extraordinary environmental requirements are not recommended without additional processing by ICS. ICS reserves the right to change any circuitry or specifications without notice. ICS does not authorize or warrant any ICS product for use in life support devices or critical medical instruments. MDS 554-01A A In te grated Circuit Systems 6 525 Ra ce Street, San Jose, CA 9512 6 Revision 101904 tel (4 08) 297-1 201 w w w. i c s t . c o m |
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